Senior Digital IC Design Engineer - Cambridge, Massachusetts United States - 32466



JOB DESCRIPTION

Job #: 32466
Title: Senior Digital IC Design Engineer
Job Location: Cambridge, Massachusetts - United States
Employment Type:
Salary: $140,000.00 - $180,000.00 - US Dollars - Yearly
Other Compensation: plus benefits & 401K
Employer Will Recruit From: Nationwide
Relocation Paid?: Yes

WHY IS THIS A GREAT OPPORTUNITY?


As a Senior Digital ASIC Designer, you will be responsible for designing high-performance digital ASICs in advanced technologies—14nm FinFET, 22FDX, etc.

JOB DESCRIPTION

We are seeking talented and motivated individuals to tackle challenging engineering problems in advanced digital IC design.
As a Senior Digital ASIC Designer, you will be responsible for designing high-performance digital ASICs in advanced technologies—14nm FinFET, 22FDX, etc.
You will be responsible for implementing designs from RTL through synthesis, scan insertion, timing closure, implementation and layout.
You will work in multi-disciplinary teams with opportunities to learn, grow and contribute to a variety of projects in different application areas.
Applicants should possess solid skills in back-end digital systems design with experience in design flows from Cadence or Synopsys, and a working knowledge of analog design principles and signal / power integrity.
Familiarity with architectures for secure systems design, e.g., cryptographic encoders / decoders or tagged processor architectures is a plus. Demonstrated experience with successful tapeouts at advanced nodes is required. Experience leading and managing design teams is also desired.

Specific Responsibilities:

 

• Defining and implementing design flows

• Leading design and implementation teams

• Synthesis, P&R, and timing closure

• DFT insertion

• Implement clock and reset nets

• Integrate third-party IP

• Top-level chip integration

• Detailed analysis design and capture

 


Required Qualifications:

 

 

• PhD or MSEE+6 preferred

• Strong analysis and problem solving skills

• Fluent in Verilog/VHDL

• Fluent in Cadence or equivalent Digital ASIC Tool Suite, e.g., Genus, Innovus, Tempus, Voltus, etc.

• Experience with high-level design, simulation, and verification tools

• Experience with scripting languages Python/PERL and regular expressions

• Ability to acquire and maintain a security clearance


Desired Qualifications:

 

• Experience with Linux/UNIX OS, piping, batching, etc.

• Experience with SRAM compilers and architecture tradespace

• Familiarity with memory design for SRAM, DRAM, and NVRAM

• Familiarity with SOC tradespace including processor selection, memory and bus implementation and architecture

• Familiarity with hardware security, e.g., encryption, key management, TRNG/DRNG, PUFs, root-of-trust, design obfuscation, etc.

• Familiarity with analog ASICs: Voltage and Current sources, Amplifiers, Converters, PLLs, and Transceivers

QUALIFICATIONS

Required Qualifications:

 

 

• PhD or MSEE+6 preferred

• Strong analysis and problem solving skills

• Fluent in Verilog/VHDL

• Fluent in Cadence or equivalent Digital ASIC Tool Suite, e.g., Genus, Innovus, Tempus, Voltus, etc.

• Experience with high-level design, simulation, and verification tools

• Experience with scripting languages Python/PERL and regular expressions

• Ability to acquire and maintain a security clearance


Desired Qualifications:

 

• Experience with Linux/UNIX OS, piping, batching, etc.

• Experience with SRAM compilers and architecture tradespace

• Familiarity with memory design for SRAM, DRAM, and NVRAM

• Familiarity with SOC tradespace including processor selection, memory and bus implementation and architecture

• Familiarity with hardware security, e.g., encryption, key management, TRNG/DRNG, PUFs, root-of-trust, design obfuscation, etc.

• Familiarity with analog ASICs: Voltage and Current sources, Amplifiers, Converters, PLLs, and Transceivers

Education:
University - Master's Degree

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